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Jyothy Institute of Technology

Affiliated to Visvesvaraya Technological University - Belagavi, Approved by AICTE - New Delhi

Electronics and Communication Engineering

Two Projects Sanctioned under 41st Series of Student Project Programme - 2017-18 - 1. Wireless Heart Rate Monitoring System with ECG Analysis 2. Design and Implementation of Vascular pattern Recognition System

Department of Electronics & Communication Engineering started in the year 2011 with an intake of 60 students in undergraduate program. The Department has a rich tradition in research and teaching. The research interests of the faculty members of the department encompass the wide area of applied and fundamental aspects of Electronics and Communication Engineering. The broad areas of research and academic activities in the department are:

  • Embedded Systems
  • Signal processing and Communication
  • Control and Computing,
  • Power Electronics.
  • Microelectronics and VLSI design and Electronic Systems.
  • Satellite Image Processing-Remote Sensing
  • Navigation Systems
  • Biodegradable PCBs

The Department has an affluent mixture of young and experienced faculty members with doctorate degree and pursuing doctoral studies, all of whom display high levels of technical knowledge, enthusiasm and dedication. Apart from teaching and research, the faculty members own professional body membership such as ISTE, IETE, Institute of Engineers and are actively involved in organizing technical workshops and industrial visits. The faculty members are encouraged to publish technical papers in national/international journals, conferences and are also involved in institutional level activities in interdisciplinary research.

The department has well equipped classrooms, seminar hall equipped with projectors, internet and Wacom devices, industry based labs to emphasize on holistic learning. In addition to the well equipped curriculum related laboratories, the department has many state of the art facilities for assisting research and development. The department encourages the students to conduct and participate in extra-curricular/sports/Technical activities under the forum of IETE.

The department has a reasonable number of sponsored student projects and ongoing research projects funded by various agencies such as KSCST, VGST, DST and SAC-ISRO. The department has MOUs with various organizations such as SAC-ISRO, NRSC-ISRO etc.

Vision

      To be a Department of excellence at a global level in Electronics and Communication Engineering education, incorporating Research & Innovation and Leadership training components.

Mission

      The Department Will,
    • Strive to provide state of Art infrastructure in classrooms and laboratories.
    • Enable all-round development with individual attention and innovative teaching learning methodology.
    • Impart leadership qualities into the students by exposing them to industry and research in global Electronics and Communication Engineering domain.

Programme Educational Objectives (PEOs)

  • PEO1: (Domain Knowledge) Graduates of Electronics & Communication Engineering will be able to utilize mathematics, science, engineering fundamentals, theoretical as well as laboratory based experiences to identify, formulate & solve engineering problems and succeed in advanced engineering or other fields.
  • PEO2: (Professional Employment) Graduates of Electronics & Communication Engineering will succeed in entry-level engineering positions in VLSI, Communication and Fabrication industries in regional, national, or global industries.
  • PEO3: (Engineering Citizenship) Graduates of Electronics & Communication Engineering will be prepared to communicate and work effectively on individual & team based engineering projects while practicing the ethics of their profession consistent with a sense of social responsibility.
  • PEO4: (Lifelong Learning) Graduates of Electronics & Communication Engineering will be equipped to recognize the importance of, and have the skills for, continuous learning to become experts in their domain and enhance their professional attributes

Programme Specific Objectives (PSOs)

  • PSO1: (Knowledge/ Skills) Explore emerging technologies in the field of Electronics & Communication Engineering using the knowledge and skills gained.
  • PSO2: (Application/Analysis/Problem solving) Apply techniques in different domains to create innovative products and services in the Communication, VLSI, DSP, and Networking.
  • PSO3: (Value/ Attribute) Work on various platforms as an individual/ team member to develop useful and safe Circuits, PCB, Power Management Systems and Automation for the society and nation.

Programme Outcomes (POs)

  • PO1: Engineering Knowledge: Apply knowledge of mathematics, science, engineering fundamentals and an engineering specialization to the solution of complex engineering problems.
  • PO2: Problem Analysis: Identify, formulate, research literature and analyze complex engineering problems reaching substantiated conclusions using first principles of mathematics, natural sciences and engineering sciences.
  • PO3: Design/ Development of Solutions: Design solutions for complex engineering problems and design system components or processes that meet specified needs with appropriate consideration for public health and safety, cultural, societal and environmental considerations.
  • PO4: Conduct investigations of complex problems using research-based knowledge and research methods including design of experiments, analysis and interpretation of data and synthesis of information to provide valid conclusions.
  • PO5: Modern Tool Usage: Create, select and apply appropriate techniques, resources and modern engineering and IT tools including prediction and modelling to complex engineering activities with an understanding of the limitations.
  • PO6: The Engineer and Society: Apply reasoning informed by contextual knowledge to assess societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to professional engineering practice.
  • PO7: Environment and Sustainability: Understand the impact of professional engineering solutions in societal and environmental contexts and demonstrate knowledge of and need for sustainable development.
  • PO8: Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of engineering practice.
  • PO9: Individual and Team Work: Function effectively as an individual, and as a member or leader in diverse teams and in multi-disciplinary settings.
  • PO10: Communication: Communicate effectively on complex engineering activities with the engineering community and with society at large, such as being able to comprehend and write effective reports and design documentation, make effective presentations and give and receive clear instructions.
  • PO11: Project Management and Finance: Demonstrate knowledge and understanding of engineering and management principles and apply these to one’s own work, as a member and leader in a team, to manage projects and in multidisciplinary environments.
  • PO12: Life-long Learning: Recognize the need for and have the preparation and ability to Engage in independent and life-long learning in the broadest context of technological changes.

Electronics and Communication Engineering

Dr. K Chandrasekhar, Head

Dr. K Chandrasekhar, Head

Pofessor & Head
Email : hod.ece@jyothyit.ac.in
Area of Interest : Signal Processing and Communication, VLSI
Total Teaching Experience as on March 2018: 23.4 years

Degrees Awarded:

Doctorate – VTU
Ph.D – Signal Processing and Communication
Masters: UVCE – Bangalore University
M.E. – Electronics Engineering
Graduation: SJCIT, Chikkaballapura, Bangalore University
B.E. – Electronics Engineering

Research, Professional and Scientific Activity:

Publications:
International / National Journals:
1. Chandrashekar K., et.al, Analysis of Pisarenko Harmonic Decomposition (PHD) based subNyquist rate spectrum sensing for broadband Cognitive Radio, Defence Science Journal, Vol. 67, No. 1, January-2017, pp. 80-87. DOI: 10.14429/dsj.67.9970
2. Chandrasekhar K., et.al, RF signal sensing in a Wideband Spectrum with subNyquist Sampling for Cognitive Radio, Journal of Scientific and Industrial Research, Vol. 75, October-2016, pp. 593-597
3. Chandrasekhar K., et.al, Wide Band Spectrum sensing of RF signal with subNyquist Sampling for Cognitive Radio, Journal of Spacecraft Technology Vol. 27, No. 2, pp. 1-10, July - December 2016.
4. Chandrashekar K., et.al, Design of Digital up-down converter for LTE-RRH in Digital Radio Systems, International Journal of Electronics Communication and Computer Engineering Vol. 4, Iss. 4, July 2013
5. Chandrasekhar K., et.al, A study of Eigenvector Algorithm (EVA) based, subNyquist rate spectrum sensing for wideband Cognitive Radio, Journal of Scientific and Industrial Research (Accepted).
6. Chandrasekhar K., et.al, RF signal sensing in a Broadband Spectrum using Hybrid Minimum Norm-PHD Method (HMNPHD) with subNyquist Sampling for Cognitive Radio, Journal of Current Science (under Review)
7. Chandrasekhar K., et.al, Performance Evaluation of Pisarenko Harmonic Decomposition and MUSIC-Like Algorithms for Narrowband Spectrum Sensing in Cognitive Radio, Journal of Scientific and Industrial Research (under Review)

International /National Conferences:
1. Chandrashekar K., et.al, Design of Digital Down Converter for LTE-RRH in Digital Radio Systems, National Conference on WiSE-2013: Wireless, Signal Processing and Embedded Systems, 21st - 22nd June 2013, at BMSCE, Bengaluru.
2. Chandrashekar K., et.al, Design of RF Front End for Software Defined Radio, National Conference on New Advances in computer and communications, 10th–11th May 2012, at MVJCE, Bengaluru.
3. Chandrashekar K., et.al, Design of Analog Radio Card for Software Defined Radio based on GSM base station, National Conference on Signal processing and Communication, 17th – 18th May 2012, at RVCE, Bengaluru.
4. Chandrashekar K., et.al, Implementation of physical layer design of Software Defined Radio, National Conference on Communication Technologies for Global Connectivity, 17th May 2011, at RVCE, Bengaluru.

Membership of Professional Bodies:
 Fellow, Institution of Engineers
 Life Member, Indian Society of Technical Education

Dr. M GeethaPriya

Dr. M GeethaPriya

Professor
Email : geetha.priya@jyothyit.ac.in, geetha.p@ciirc.jyothyit.ac.in
Area of Interest : Image Processing, Remote Sensing Applications, Reversible Logic Computing and GNSS.
Total Teaching Experience as on March 2018: 12.6 years

Degrees Awarded:

Doctorate – Anna University
Ph.D – Information & Communication Engineering
Masters: Anna University
M.E. – VLSI Design
Graduation: Anna University
B.E. – Electronics & Communication Engineering

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
IETE
IAENG

Journal Reviewer:
 Journal of Internet Technology  World Journal of Engineering and Physical Sciences  IET Chennai SEISCON  World Applied Sciences Journal Publications:
Co-inventor of the following Patents filed:
1. Three Transistor based Logic Gates for Low Power and High Speed Applications, Indian Patent, Application No.3771/CHE/2013 A
2. Disposable bandage with embedded smart electronics for continuous monitoring of chronic wounds, Application No. 201741003967
3. Exercise tools for children with juvenile Arthritis, Application No. 201741016090

Funded Projects ongoing
1. Evaluation of airborne L and S band SAR for disaster damage identification- under NISAR mission , SAC-ISRO, Ahmedabad, 2017-2020 (PI)
2. Waste to wealth approach: development of completely biodegradable PCBs using proteins and natural fiber based composites- under SMYSR, VGST-KSCST, 2018-2019 (PI)
3. IRNSS navigation receiver field trial and data collection, SAC-ISRO, Ahmedabad, 2017-2019 (PI)
4. Development of low cost iron based flow batteries for grid level energy storage- under MES call, DST, 2017-2020 (Co-PI)
5. Snow cover, snow depth and snowline studies in Himalayan basins – under HiCOM initiative, NCAOR- Ministry of Earth Sciences, GOI, 2018-2020 (PI)

International / National Journals:
1. Geetha Priya, M, et.al. Position Error Analysis of IRNSS Data Using Big Data Analytics , Cognitive Computing and Information Processing-Springer, 2018 (Accepted)
2. Geetha Priya M, et.al. A New Low-Power 4T-Based 2 Three-Input Universal Gate 3 for High-Speed Applications , Innovations in Computer Science and Engineering-Springer, 2018 (Accepted )
3. Krishnaveni D, Geetha Priya M, Reversible Signed Division for Computing Systems , International Journal of Electrical and Computer Engineering (WASET) 2018 (Accepted)
4. Anarghya Dinesh, Geetha Priya M, et.al., Iron‐based flow batteries to store renewable energies , Environmental chemistry letters-Springer, pp 1-12, 2018
5. Krishnaveni D, Geetha Priya M, Reversible Binary Arithmetic for Integrated Circuit Design , Vol:12, No:1, International Journal of Computer and Information Engineering (WASET), pp 33-37, 2018
6. Krishnaveni D, Geetha Priya, M, A Novel Reversible Ex-Nor SV Gate And Its Application vol 5, Lecture Notes in Networks and Systems-Springer, pp 105-114, 2017
7. Krishnaveni D, Geetha Priya, M, A Novel Reversible n–Bit Counter for Low Power Quantum Computing , International Journal of Control Theory and Applications, Vol.No.10, Issue No.3, pp 11-20, 2017
8. Geetha Priya, M, et.al. Radar and its applications , International Journal of Control Theory and Applications, Vol.No.10, Issue No.3, pp 1-9, 2017
9. Vijay Guna, Geetha Priya, M, et.al. Plant-Based Completely Biodegradable Printed Circuit Boards , IEEE Transactions on Electron Devices, pp 1-6, 2016
10. Shyamala, Geetha Priya, M, et.al. Wireless Sensor Network For Resources Tracking At Building Construction Sites , International Journal of Innovative Research in Science and Engineering, Vol 2, Issue 8, pp 124-132, 2016
11. Geetha Priya, M, Sleepy-Pass gate based leakage reduction technique for CMOS VLSI circuits , International Journal of Engineering Associates, vol.4, issue no.12, pp 7-9, 2015.
12. Geetha Priya, M , ‘High Speed OR/AND Logic Gates with Reduced Transistor Count for Low Power Applications , International Journal of Applied Engineering Research, vol.9, no. 24, Special Issue, pp. 7946-7950, 2014.
13. Geetha Priya, M , Low Power Full Adder Cells For Low Voltage And High Speed Applications , International Journal of Applied Engineering Research, vol.9, no. 21, Special Issue, pp.4848-4853, 2014.
14. Geetha Priya, M, Mathumathi, A, Nivya Mohan, R, Neethu Babu, Anoop, Leakage Power Optimization for VLSI Circuits @90nm CMOS Process , International Journal of Engineering and Advanced Technology, vol.3, no.4, pp.69-72, 2014.
15. Geetha Priya, M & Baskaran, K, A New Universal Gate for Low Power SoC Applications , Sadhana, vol. 38, Part 4, pp. 645–65, 2013.
16. Geetha Priya, M & Baskaran, K, A Novel Low Power 3 Transistor based Universal Gate for VLSI Applications , Journal of Scientific and Industrial Research, vol.72, pp.217-221, 2013.
17. Geetha Priya, M, Baskaran, K & Srinivasan, S, Robust & Energy Efficient Universal Gates for High Performance Computer Networks at 22nm Process Technology , International Journal of Computer, Information Science and Engineering vol.7, no.11, issue 83, pp.586-591, 2013.
18. Geetha Priya, M, Baskaran, K & Srinivasan, S, Parity Generator and Checker for Serial Data Communication with Reduced Transistor Count , Global Academic Research Journal, vol.1, issue.3, pp.50-57, 2013.
19. Geetha Priya, M & Baskaran, K, High Performance Low Power NOR Gate , The International Journal of Computer Science & Application, vol. 2, no. 05, ISSN - 2278-1080, pp.18-22, 2013.
20. Geetha Priya, M & Baskaran, K, Low Power Full Adder with Reduced Transistor Count , International Journal of Engineering Trends and Technology, vol.4, no.5, pp.1755-1759, 2013.
21. Geetha Priya, M, Baskaran, K & Krishnaveni, D, Leakage Power Reduction Techniques in Deep Submicron Technologies for VLSI Applications , Elsevier Procedia Engineering, vol. 30, pp.1163-1170, 2012.
22. Geetha Priya, M, Baskaran, K & Krishnaveni, D, A Novel Leakage Power Reduction Technique for CMOS VLSI Circuits , European Journal of Scientific Research, vol. 74, no.1, pp.96-105, 2012.
23. Geetha Priya, M, Baskaran, K & Krishnaveni, D, Design of an Efficient Reversible 8x8 Wallace Tree Multiplier , World Applied Sciences Journal, vol. 20, no. 8, pp. 1159-1165, 2012.
24. Geetha Priya, M, Baskaran, K, Krishnaveni, D & Srinivasan, S, A New Leakage Power Reduction Technique for CMOS VLSI Circuits , Journal of Artificial Intelligence, vol.5, pp. 227-232, 2012.
25. Geetha Priya, M & Krishnaveni, D, A Novel Design of Reversible Universal Shift Register with Reduced Delay and Quantum Cost , Journal of Computing, vol. 4, no. 2, pp. 164 -173, 2012.
26. Geetha Priya, M, Baskaran, K & Srinivasan, S, PTL/CMOS Logic based Full Adder for High Speed Applications , International Journal of Advanced Computing, vol. 35, special issue. 2, pp. 84-87, 2012.
27. Geetha Priya, M & Krishnaveni, D, A Novel Design of Reversible Serial and Parallel Adder/Subtractor , International Journal of Engineering Science and Technology, vol. 3, no. 3, pp. 2280-2288, 2011.
28. Geetha Priya, M & Reshma, P, Power management during scan based sequential circuit testing , Advance Computing: An International Journal, vol.2, no.3, pp. 9-20, 2011.

International /National Conferences:
1. GeethaPriya, M, “Low Power Full Adder Cells For Low Voltage And High Speed Applications‟, International Conference on Pattern Recognition and Multimedia Signal Processing, Chidambaram, India, January 9-10, 2015.
2. GeethaPriya, M , ‘High Speed OR/AND Logic Gates with Reduced Transistor Count for Low Power Applications‟, International Conference on Emerging Electrical systems and Control, Madurai, India, December 4-5, 2014.
3. GeethaPriya, M&Baskaran, K, “High Speed Logic Gates with Reduced Transistor Count for Low Power Applications”, International Conference on Electrical Sciences, Tanjore, India, August 9-10, 2013.
4. GeethaPriya, M, Baskaran, K &Srinivasan, S , “Low Power Full adder Cells for Low Voltage and High Speed Applications”, International Conference on Electrical Sciences, Tanjore, India, September 14-15, 2012.
5. GeethaPriya, M., Baskaran, K., Krishnaveni, D. and Srinivasan, S. “A New Leakage Power Reduction Technique for CMOS VLSI Circuits”, International Conference on Embedded and Cloud Computing, Tanjore, India, June 2-3, 2012.
6. GeethaPriya, M, Baskaran, K &Srinivasan, S, “PTL/CMOS Logic based Full Adder for High Speed Applications”, Proceedings of International conference on Recent trends in Computer Science, Anna University, Chennai, July 2, pp.311-314, 2012 (ISBN: 978009949308X),.
7. GeethaPriya, M, Baskaran, K &Srinivasan, S, RubanPrasanth, S, Adarsh, LR, Ravi Ramanan, Rajalakshmi, A &VigneshVarman, E 2012, “ALR: A New Methodology for Leakage Power Reduction”, International Conference on Electronics Computer Technology, Kanyakumari, India, April 6-8, 2012.
8. GeethaPriya, M. and Krishnaveni, D. “Leakage current reduction techniques for CMOS VLSI circuits-A survey”, International Conference on Emerging Trends in Signal Processing and VLSI Design, Guru Nanak engineering College, Hyderabad, June 11-13, 2010.
9. GeethaPriya, M. “Leakage current reduction in CMOS VLSI circuits by input vector control method”, National Conference on Innovations in Electrical, Electronics and Control Systems, Kumaraguru College of Technology, Coimbatore, March 20-21, 2009.
10. GeethaPriya, M. “Leakage current reduction in CMOS VLSI circuits”, NCICC 2009, SNSCT, Coimbatore, March 6th, 2009.
11. GeethaPriya, M. “RFID Applications”, National Conference on Soft Computing 2006, HICET, Nov 17-18, Coimbatore, 2006.

Dr. H B M Ajjaiah

Dr. H B M Ajjaiah

Associate Professor
Email : ajjaiah.hbm@jyothyit.ac.in
Area of Interest : Basic Electronics, Analog Electronics , Microelectronics, Power Electronics, Evolutionary Algorithm, Microcontroller, Biomedical Signal Processing, Adaptive filters and Transmission lines.
Total Teaching Experience as on March 2018: 14 years
Total Industrial Experience as on Aug 2014: 1 years

Degrees Awarded:

Doctorate – Gulbarga University
Ph.D. – Adaptive Filters in Evolutionary algorithm
Masters: PDAEC – VTU
M.Tech . – Power Electronics
Graduation: REC Bhalki, Gulbarga University
B.E. – Electronics and Instrumentation Engineering

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
1.  Life Member, Indian Society of Technical Education

Publications:
International / National Journals:
1. AJJAIAH H.B.M., et.al, Variable Step-size least mean squares adaptive filters, International Journal of Advanced Research (2015), Volume 3, Issue 6, 530-534
2. AJJAIAH H.B.M., et.al, REVIEW PAPER ON DIFFERENT TECHNOLOGY ON ECHO CANCELLATION , International Journal of Advanced Research( July (31) issue, VOL 3 (2015)
3. AJJAIAH H.B.M., et.al, VARIABLE STEP SIZE OF LMS ALGORITHEM USING PARTICAL SWARM OPTIMIZATION, International Journal of Research in Engineering and Technology Volume: 03 Special Issue: 03 | May-2014.
4. AJJAIAH H.B.M., Design Method Based on Swarm Algorithm for Digital Adaptive Filters, International Journal of Research and Analytical Reviews (under Review)

International /National Conferences:
1. AJJAIAH H.B.M., et.al, Comparative study of Particle Swarm Optimization, Differential Evolutional and Evolutionary Algorithm for Adaptive filters , Advances in Wireless Sensor Network and Its Applications, Special Issue (SPEED), pp.104-106, 2015. [ISSN: 2349-8226].
2. AJJAIAH H.B.M., et.al, Variable step size of LMS uses PSO in Communication System , 2nd International Conference on Advanced Trends in VLSI and Signal Processing, at K S Institute of Technology, Bangalore, pp. 97-100,13th to 14th August 2014,.
3. AJJAIAH H.B.M., et.al, Design Method Based on Swarm Algorithm for Digital Adaptive filters , International Conference on Recent Cognizance in Wireless Communication and Image Processing, at Poornima Institute of Engineering and Technology, Jaipur, Rajasthan, pp.86, 16th to 17th January 2015.
4. AJJAIAH H.B.M., et.al Comparative study of Particle Swarm Optimization, Differential Evolutional and Evolutionary Algorithm for Adaptive filters , Advances in Wireless Sensor Network and Its Applications, Special Issue (SPEED), pp.104-106, 2015
5. AJJAIAH H.B.M., et.al, Adaptive Filters in Digital Transmission Based on Improved LMS Algorithm , International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET 2016), Chennai Jaipur, Rajasthan, pp.985-988, 2016 in IEEE Explore
6. AJJAIAH H.B.M., et.al, Adaptive filters using EVSSLMS Algorithms based on the Communication System , International conference on Signal Processing, Communication, Power and Embedded System (SCOPES)-pp-54-56, 3rd and 4th October, 2016 organized by Centurion University of Technology & Management Paralakhemundi, Odisha, India in IEEE Explore.
7. AJJAIAH H.B.M., et.al, Design Method Based on Swarm Algorithm for Digital Adaptive filters , International Conference on Recent Cognizance in Wireless Communication and Image Processing, at Poornima Institute of Engineering and Technology, Jaipur, Rajasthan, pp.86, 16th to 17th January 2015
8. AJJAIAH H.B.M., et.al, An evolutionary variable step size control technique for lacking length of fixed LMS algorithm , International Conference on Electrical, Electronics, Communication, Computer and Optimization Technique (ICEECCOT), pp-151-154, December 9th -10th, 2016 in IEEE Explore.

Mr. Chandrashekar B M

Mr. Chandrashekar B M

Assistant Professor
Email : chandra.shekar@jyothyit.ac.in
Area of Interest : Power distributions and Optimization Technique
Total Teaching Experience as on March 2018: 13 years
Total Industrial Experience as on Aug 2014: 03 years

Degrees Awarded:

Masters: UVCE – Bangalore University
M.E. Ppower & Energy Systems
Graduation: GCE,Ramanagaram, Bangalore University
B.E. – Electrical & Electronics Engineering

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
1.  Life Member, Institute of Electronics & Telecommunication Engineering.
2.  Life Member, Institution of Engineers
3.  Life Member, Indian Society of Technical Education

Publications:
International / National Journals:
1. Chandrashekar B.M., et.al, Wearable IOT medical Alert device with Fall Detection and Real Time Posture Monitoring. Journal of recent & Innovation Trends in Computation.2016
2. Chandrasekhar B M ., et.al, Service Restoration in IEEE 30 bus system by utilization Evolutionary Programming and Trapezoidal function to tackle unsupplied customers,IJTET,6(1),14-26,ISSN:2349-9303,2015

International /National Conferences:
1. Chandrashekar B M., et.al, Multi-objective Wind Farm layout optimization using evolutionary computations on International Conference on Communication Technologies, Bengaluru(under Review).
2. Chandrashekar B M., et.al, A Further Simplified Algorithm for Blink Recognition Using Video Oculography for Communicating, National Conference on Communication Technologies, Bengaluru.

Nagaraj S

Nagaraj S

Assistant Professor
Email : nagaraj.s@jyothyit.ac.in
Total Teaching Experience as on March 2018: 17 years

Degrees Awarded:

Masters: VTU regional center (UTL),Bengaluru – VTU
M.Tech . – VLSI DESIGN AND EMBEDDED SYSTEMS
Graduation: UBDT College of Engineering, Kuvempu University
B.E. – Electrical and Electronics Engineering

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
 Life Member, Indian Society of Technical Education

Mr. Guru Prasad M Bhat

Mr. Guru Prasad M Bhat

Assistant Professor
Email : guruprasad.bhat@jyothyit.ac.in
Area of Interest : VLSI and Embedded Systems, Image Processing and Video Processing
Total Teaching Experience as on March 2018: 11.6 years

Degrees Awarded:

Masters: Regional Center Belgaum – VTU
M.Tech. – Electronics Engineering
Graduation: BIET, Davangere, VTU
B.E. – Electrical & Electronics Engineering
Currently pursuing
Doctorate – VTU
Ph.D (Pursuing) – Image Processing

Research, Professional and Scientific Activity:

Projects Sanctioned:
1. Under KSCST 41st Series of Student Project Programme: 2017 - 2018 Project Proposal Ref. No. 41S_BE_2376 “DESIGN AND IMPLEMENTATION OF VASCULAR PATTERN RECOGNITION SYSTEM” Sanctioned Amount Rs. 5000/-
2. Under KSCST 40th Series of Student Project Programme: 2016 - 2017 Project Proposal Ref. No. 40S_BE_2022 “A MODULAR APPROACH TO DIABETIC EXAMINATION WITH ALERT SYSTEM BASED ON INTERNET OF THINGS” Sanctioned Amount Rs. 6000/-

Projects Seminar and Exhibition:
1. Under KSCST 40th Series of Student Project Programme: 2016 - 2017 Project Proposal Ref. No. 40S_BE_2022 “A Modular Approach to Diabetic Examination with Alert System Based on Internet of Things” Selected for State Level Seminar and Exhibition (S&E) held at NMAM Institute of Technology, Nitte on 11th and 12th August 2017

Awards:
1. Awarded as Best Paper Presenter for the paper entitled “A novel IoT based framework for blood glucose examination" 2017 International Conference on Electrical, Electronics, Communication, Computer, and Optimization Techniques (ICEECCOT), Mysuru, India, 2017.

International /National Conferences:
1. Bhat, G. M.; et.al, (2018) Novel Real-Time Video Surveillance Framework for Precision Pesticide Control in Agribusiness. In: Nagabhushan T., Aradhya V., Jagadeesh P., Shukla S., M.L. C. (eds) Cognitive Computing and Information Processing. CCIP 2017. Communications in Computer and Information Science, vol 801. Springer, Singapore

Membership of Professional Bodies:
 Life Member, Indian Society of Technical Education

Publications:
International / National Journals:
1. Bhat, G. M.; et.al, Eye Gaze Recognition System, in Perspectives in Communication, Embedded-Systems and Signal-Processing (PiCES), vol. 1,no.,4, pp. 39-41, July 2017ISSN: 2566-932X URN: urn:nbn:de:101:1-20170716590.
2. Bhat, G. M.; et.al, Design and Implementation of Visual Cryptography System for Transmission of Secure Data , July 17 Volume 5 Issue 7 , International Journal on Recent and Innovation Trends in Computing and Communication (IJRITCC), ISSN: 2321-8169, PP: 718 – 721 Impact Factor (SJIF) 5.837.
3. Bhat, G. M.; et.al, Eye Gaze Recognition System to Assist Paralyzed Patients, in Perspectives in Communication, Embedded-Systems and Signal-Processing (PiCES), vol. 1,no.,2, pp. 4-5, May 2017. ISSN: 2566-932X URN: urn:nbn:de:101:1-20170716590
4. Bhat, G. M.; et.al, A Modular approach to diabetic examination with alert system based on IoT International Journal of Scientific Development and Research (IJSDR) Volume 2, Issue 5, May 2017 ISSN: 2455-2631. Impact Factor:5.47.
5. Bhat, G. M.; et.al, Securing Secret Messages: A Review in International Journal of Advanced Research in Computer and Communication Engineering ISSN (Online) 2278-1021 ISSN (Print) 2319 5940 DOI 10.17148/IJARCCE.2016.5578, Vol. 5, Issue 5, May 2016. Impact Factor:5.947.

International /National Conferences:
1. Bhat, G. M.; et.al, A novel IoT based framework for blood glucose examination, 2017 International Conference on Electrical, Electronics, Communication, Computer, and Optimization Techniques (ICEECCOT), Mysuru, India, 2017, pp. 205-207.doi: 10.1109/ICEECCOT.2017.8284666

Mrs D krishnaveni

Mrs D krishnaveni

Asst. Professor
Email : d.krishnaveni@jyothyit.ac.in
Area of Interest : Digital Circuits, CMOS VLSI, Reversible Logic
Total Teaching Experience as on March 2018: 19.7 years

Degrees Awarded:

Masters: BMSCE – VTU
M.Tech. – Electronics Engineering
Graduation: SVHCE, Machilipatnam, Nagarjuna University
B.E. – Electronics & Communication Engineering

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
 Life Member, Indian Society of Technical Education

Publications:
International / National Journals:
1. Krishnaveni, D, et al., Reversible Binary Arithmetic for Integrated Circuit Design , Vol:12, No:1, 2018, WASET, International Science Index, International Journal of Computer and Information Engineering
2. Krishnaveni, D, et al., A Novel Reversible Ex-Nor SV Gate And Its Application vol 5, LNNS series, Springer, pg 105-114.
3. Krishnaveni, D, et al., A Novel Reversible n–Bit Counter for Low Power Quantum Computing International Journal of Control Theory and Applications, Vol.No.10, Issue No.3, 2017, Pg 11-20
4. Krishnaveni, D, et al., Leakage Power Reduction Techniques in Deep Submicron Technologies for VLSI Applications‟, Elsevier Procedia Engineering, vol. 30, pp.1163-1170, 2012. (Scopus Indexed).
5. Krishnaveni, D, et al., A Novel Leakage Power Reduction Technique for CMOS VLSI Circuits , European Journal of Scientific Research, ISSN: 1450-216X, Vol 74, Issue 1, 2012, Pg no. 96-105. (IF=0.367, Scopus Indexed)
6. Krishnaveni, D, et al., Design of an Efficient Reversible 8x8 Wallace Tree Multiplier World Applied Sciences Journal, ISSN: 1818-4952, Vol 20, Issue 8, 2012, Pg no. 1159-1165. (IF=0.234, Scopus Indexed).
7. Krishnaveni, D, et al., A New Leakage Power reduction Technique for CMOS VLSI Circuits , Journal of Artificical Intelligance, ISSN: 1994-5450, Vol 5, Issue 4, 2012, Pg no. 227-232. (SCI Indexed, Scopus Indexed).
8. Krishnaveni, D, et al., A Novel Design of Reversible Universal Shift Register with Reduced Delay and Quantum Cost , Journal of Computing, ISSN: 2151-9617, Vol 4, Issue 2, Feb 2012, Pg no. 164-173.
9. Krishnaveni D., et al., VLSI Implementation Of Vedic Multiplier With Reduced Delay International Journal of Advanced Technology & Engineering Research, ISSN: 2250-3536, Vol 2, Issue 4, July 2012, Pg no. 10-14.
10. Krishnaveni, D, et al., A Novel Design of Reversible Serial and Parallel Adder/Subtractor‟, International Journal of Engineering Science and Technology, vol. 3, no. 3, pp. 2280-2288, 2011. (IC=3.14, Scopus Indexed).

International /National Conferences:
1. Krishnaveni, D, et al., A Novel Reversible Ex-Nor SV Gate And Its Application , 3rd International conference on Computer and Communication Technologies (IC3T) (Devineni Venkataramana & Dr. Himasekhar MIC college of technology, Vijayawada, Andhra Pradesh) 5th – 6th November 2016.
2. Krishnaveni, D, et al., A Novel Reversible n–Bit Counter for Low Power Quantum Computing , International conference on Novel issues and challenges in science and engineering’16, 29th – 30th July 2016
3. Krishnaveni D., et al., VLSI Implementation Of Vedic Multiplier With Reduced Delay , International Conference on Emerging trends in technology (NCET-Tech) (Nagarjuna College of Engineering and technology) 2012
4. Krishnaveni, D., et al., Leakage current reduction techniques for CMOS VLSI circuits-A survey,‟ International Conference on Emerging Trends in Signal Processing and VLSI Design, Guru Nanak engineering College, Hyderabad, June 11-13, 2010.

Mr. Deepak V Ingale

Mr. Deepak V Ingale

Asst. Professor
Email : deepak.vi@ciirc.jyothyit.ac.in
Area of Interest : Sensor development Signal processing VLSI Embedded system design
Total Teaching Experience as on March 2018: 10 years
Total Industrial Experience : 3.6 years

Degrees Awarded:

Masters: Dr.AIT – VTU
M.Tech. – VLSI & Embedded Systems
Graduation: KSIT, VTU
B.E. – Electronics & Communication Engineering

Research, Professional and Scientific Activity:

Publications:
1. Deepak V. Ingale et.al, Design and development of Ka-band carrier generator for IRS applications, International Journal of Microwave and Wireless Technologies, 7(6), 637-644. doi:10.1017/S175907871400107X
2. Deepak V. Ingale et.al, Design and development of PLL based X-band carrier generator for satellite applications, International Journal of Science, Engineering and Technology Research (IJSETR), 2014 Mar; 3(3).
3. Deepak V. Ingale et.al, Multiwalled carbonnanotubes enhance the response and sensitivity of ammonium biosensor abased on alanine dehydrogenase, Journal of Electroanalytical Chemistry 784 (2017): 102-108.

Co-authored:
1. Deepak V. Ingale, Chandrasekhar K., et.al, A study of Eigenvector Algorithm (EVA) based, subNyquist rate spectrum sensing for wideband Cognitive Radio, Journal of Scientific and Industrial Research (Accepted).

Mrs. Sumangala G

Mrs. Sumangala G

Assistant Professor
Email : sumangala.gejje@jyothyit.ac.in
Area of Interest : Communication Systems, Antennas, Internet of Things
Total Teaching Experience as on March 2018: 8 years
Total Industrial Experience as on Aug 2014: 01 year

Degrees Awarded:

Masters: RVCE – VTU
M.Tech. – Communication Engineering
Graduation: PDIT, HOSPET, VTU
B.E. – Electronics and Communication

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
1.  Life Member, Institution of Electronics and Telecommunication Engineers
2.  Life Member, Indian Society of Technical Education

Publications:
International / National Journals:
1. Sumangala Gejje., et.al, Design and implementation of a gas leakage detector using wireless data, acquisition system for real time applications using the concept of IoT, International Journal on Recent and Innovation Trends in Computing and Communication, Volume: 4 Issue: 4, ISSN: 2321-8169,April 2016.

International /National Conferences:
1. Sumangala Gejje., et.al, Mobile solutions to interface J2ME and Symbian for Application Development National Conference on Computational Control Systems and Optimization: 12th – 13th May 2011, at Dr. AIT, Bengaluru.

Mr. Nagesh Kumar D N

Mr. Nagesh Kumar D N

Assistant Professor
Email : nagesh.kumar@jyothyit.ac.in
Area of Interest : VLSI & Embedded Systems
Total Teaching Experience as on March 2018: 9.8 years
Total Industrial Experience as on Aug 2014: 04 years

Degrees Awarded:

Masters: UTL Technologies – Visvesvaraya Technological University
M.Tech – VLSI and Embedded Systems
Graduation: SSIT, Tumkur, Visvesvaraya Technological University
B.E. – Telecommunication Engineering

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
 Life Member, Institution of Electronics and Telecommunication Engineers
 Life Member, Indian Society of Technical Education

Publications:
International / National Journals:
1. Nagesh Kumar D.N, Human Area Networking in the International Conference on Computer Science and Technology Allies in Research organized by City Engineering College, held on 27 & 28 April, 2016.
2. Nagesh Kumar D.N, ARM Based Remote Monitoring and Control System for Environmental Parameters in Greenhouse in the 2015 IEEE International Conference on Electrical, Computer and Communication Technologies (IEEE ICECCT) held at SVS College of Engineering, Coimbatore, Tamilnadu, India, during 05-07, March 2015.
3. Nagesh Kumar D.N, Interfacing of T/R modules with radar system through TRMC in National Conference on Informative and Innovative Technologies, March 2010, held at R. R. Institute of Technology, Bangalore.

Mr. B Rajesh Rao

Mr. B Rajesh Rao

Assistant Professor
Email : rajesh.rao@jyothyit.ac.in
Area of Interest : Embedded system design Image processing
Total Teaching Experience as on March 2018: 4.5 years
Total Industrial Experience as on Aug 2014: [07 years]

Degrees Awarded:

Masters: S.I.T., Valachil, Mangalore – V.T.U., Belgaum.
M.Tech. – Digital Electronics
Graduation: M.C.E., Hassan. Mysore University
B.E. – Electronics & Communication Engineering

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
 Life Member, The Institution of Electronics and Telecommunication Engineers  Life Member, Indian Society of Technical Education

Publications:
International / National Conferences:
1. Rajesh Rao B. et.al, An evolutionary variable step size control technique for lacking length of Fixed LMS Algorithm in ICEECCOT – 2016 in association with IEEE, held at GSSSIE&T for women, Mysore on 9th & 10th December 2017.
2. Rajesh Rao B. et.al, Adaptive Filters in Digital Transmission based on Improved LMS Algorithm at IEEE WISPNET 2016 conference.
3. Rajesh Rao B. et.al, Optimized Image Encryption method based on Carrier Image , held on 23RD APRIL 2016 at GSSSIETW, Mysuru in association with Pubicon International Publication
4. Rajesh Rao B. et.al, Design and implementation of high end multiple security based ATM monitoring system , in IJRITCC Journal, Volume 4, Issue 4, April 2016
5. Rajesh Rao B. et.al, Variable step size of LMS algorithm using Partial Swarm Optimization , held on 13th – 14th Aug 2014 at K.S.I.T., Bengaluru- 560062.
6. Rajesh Rao B. et.al, Visual Cryptography for biometric data privacy using GEVC Scheme in 9th KSTA annual conference, jointly organized by KSTA and Christ University held during 20th to 21st December 2016 and won II nd Prize.

Mr. Madhukar M

Mr. Madhukar M

Assistant Professor
Email : madhukar.m@jyothyit.ac.in
Area of Interest : Embedded Systems and VLSI
Total Teaching Experience as on March 2018: 3.8 years

Degrees Awarded:

Masters: Manipal University
MSc-Tech. – Embedded Sytems
Graduation: Shirdi Sai Engg College, Anekal, VTU
B.E. – Electronics and Communication Engineering

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
 Associate Member, the Institution of Electronics and Telecommunication Engineers
 Life Member, Indian Society for Technical Education

Publications:
International / National Journals:
1. Madhukar M , Android Controlled Home Automation , International Journal For Trends in Engineering & Technology, Volume-7, Issue-1, PP. 96-98, July 2015, (ISSN: 2349-9303)
2. Madhukar M , Wireless ARM Based Automated System for Geriatrics , International Journal Of Recent and Innovation Tends in Computing and Communication,Volume -3, Issue-8, PP. 5350-5353, August 2015, (ISSN: 2321-8169)
3. Madhukar M , Automated Traffic Signals:A Review , International Journal Of Advanced Research In Computer And Communication Engineering, Volume -5, Issue-5, PP. 334-336, May 2016, (ISSN(Online): 2278-1021) , (ISSN(Print)): 2319-5940)
5. Madhukar M , Exudate Extraction: A Review , Perspectives in Communication, Embedded-Systems and Signal-Processing, Volume -1, Issue-2, PP. 5-6, May 2017, (ISSN: 2566-932x)
6. Madhukar M , Design and Development of a Touch Screen Based on Vide Processing , Perspectives in Communication, Embedded-Systems and Signal-Processing, Volume -1, Issue-2, PP. 10-11, May 2017, (ISSN: 2566-932x)

Mrs. Smita Agrawal

Mrs. Smita Agrawal

Asst. Professor
Email : smitha.agarwal@jyothyit.ac.in
Area of Interest : Computer networks, Network security, Cryptography, Internet of Things
Total Teaching Experience as on March 2018: 1.5 years

Degrees Awarded:

Ph.D – Pursuing (VTU)
Masters: TOCE – VTU
M.TECH – Power Electronics
Graduation: GNIT, Greater Noida, UPTU
B.Tech – Electronics and Communication Engineering

Research, Professional and Scientific Activity:

Publications:
International /National Conferences:
1. Smita Agrawal, et.al, LLC Resonant DC-DC Converter for High Efficiency Solar Array Simulator, National Conference on horizons in Power Engineering-2015, at KS School of Engineering & management, Bengaluru.
2. Smita Agrawal, et.al, LLC Resonant DC-DC Converter for High Efficiency Solar Array Simulator, National Conference on Artificial Intelligence & Software Engineering-2015, at New Horizon College of Engineering, Bengaluru

Mrs Ashwini Dasare

Ashwini Dasare

Asst. Professor
Email : ashwini.dasare@jyothyit.ac.in
Area of Interest : Image Processing, Remote Sensing
Total Teaching Experience as on March 2018: 3 years

Degrees Awarded:

Masters: DSCE, Bengaluru. – VTU
Graduation:AIT, Gulbargaa, VTU
B.E. – Electronics and Communication Engineering

Research, Professional and Scientific Activity:

Publications:
National Conferences:
1. Ashwini Dasare, Shahla Sohail, Early detection of stroke using texture analysis on CT images in proceedings of National conference on Current Trends in Computer Science & Engineering,8th June 2013,at Jain University.

Dr T.G.S Moorthy

Dr T.G.S Moorthy

Visiting Professor
Email : drtgsm@gmail.com
Area of Interest : Satellite Communication, Microwave, Optical Fibre Communication.
Total Teaching Experience as on March 2018: 46 years

Degrees Awarded:

Doctorate – Sagar University, MP
Ph.D. – Solid State Physics
Masters: Sagar University, MP
M.Sc., . – Solid State Physics
A.M.I.E - Telecommunication, IE
Graduation: Sagar University, MP
B.Sc., . – Physics

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
 Life Member, Indian Society of Technical Education
 Associate Member of Institute of Engineers

University Assignments:
1. Chairman & member of Board of Examiner at Mangalore University & Kerala University;
2. Member of Board of Studies and of Affiliation Committee at Mangalore University;
3. Member of UPSC Interview Panel for IES;
4. Academic Senate Member, VTU;
5. Chairman and Board Member of Mangalore & Kerala Universities;
6. Member of Board of Examination, Bangalore University;
7. Member of Faculty, Mangalore University;
8. Member of UPSC Interview Panel for IES;
9. Chairman & member of Affiliation Committee at VTU & Madras Universities

Continuing Education Program
1. Attended Summer School in Fiber optics and acoustics at IISc, Bangalore
2. Attended Summer School material science at IIT Kanpur.
3. Attended Summer School in solid state physics at IIT, Madras.

Co-curricular Activities
1. Attended and Participated in Indian Engineering Congress 2011 from 15th to 18th of December 2011 at Palace, Palace Grounds, Bangalore.
2. Attended ISTE Annual conference at NIT,Calicut
3. Attended ISTE State Conference at Davanagere.

Publications:
1. Chandrashekar K., Moorthy T.G.S,et.al, Analysis of Pisarenko Harmonic Decomposition (PHD) based subNyquist rate spectrum sensing for broadband Cognitive Radio, Defence Science Journal, Vol. 67, No. 1, January-2017, pp. 80-87. DOI: 10.14429/dsj.67.9970

Mr. N. Narasimha Swamy

Mr. N. Narasimha swamy

Visiting Professor
Email : ennenness@gmail.com
Area of Interest : Basic Electrical, Basic Electronics, Electrical Machines, Control Systems, Network Analysis, Field Theory, Antenna Propagation, Analog Communication, Signal and Systems, DSP and few more.
Total Teaching Experience as on March 2018: 50 years

Degrees Awarded:

Masters: UVCE, Bangalore University
M.E. - Electrical Power Systems
Graduation: BMSCE, Bangalore University
B.E. - Electrical Engineering
B.Sc. - PCM (National College, Basavanagudi, Bengaluru)

Research, Professional and Scientific Activity:

Membership of Professional Bodies:
 Life Member, Indian Society for Technical Education

Publications:
Text Books:
1. “Basic Electrical Engineering” – Eastern Book Promoters, Belagavi, 2015
2. “Electrical Engineering Economics & Industrial Management”, Dynaram Publishers, Bengaluru; 1992
3. “Electrical Technology”, Sudha Publications, Bengaluru; 1991
4. “Electrical Engineering Laboratory Manual for First year Students”; 1990

Innovations by the Faculty in Teaching and Learning
1. Blackboard- mapped to skills: Additional problems are given to students to solve on the board during class.
2. Wacom Bamboo- mapped to skills: Presentations are made interactive with real time editing.
3. Laboratories- Additional programs are given to enhance knowledge, skills, and employability of students.
4. Presentation- ICT enabled presentations enhance the students involvement in classes.
5. Student presentation: students re encouraged to design, build and present ideas/topics in class to develop their communication skills and empower constructive criticism.
6. Projects: Students are required to develop mini projects in addition to VTU curriculum to enrich their problem solving, presentations and communication skills. This enables them to address burning social economic.
7. Quizzes: Students are given oral as well as written quizzes to aid them better in learning concepts, methods and skills.



MOU’s are done with industries to emphasize on
a. Internship
b. Industrial Visits

Department has MOU with the following companies
• BSNL
• I Triangle
• Protocol
• Space Applications Centre- ISRO, Ahmedabad
• National Remote Sensing Centre- ISRO, Hyderabad
• Rackminds Technology Solutions Pvt, Ltd
• Karnataka German Technical Institute (KGTTI)
• Sakuraa India Foundation.

Technical Talks

Topic Date Speaker
“Signal Processing” Scheduled on April 11 2018 Dr. H V Kumarswamy from RVCE, Bangalore
“Micro system packaging” Scheduled on April 04 2018 Dr. Mahesh G V from IISc, Bangalore
“Product Design” February 06 2016 Mr NitinAwasthi, vice president of Apsis technologies

Industrial Visits

Sl No Date Semester No. of Students Place Faculty Incharge
1 28-9-12 3 44 JVS Electronics Mr Nagaraj S
2 25-4-13 3 45 ISRO Mr Chandrashekar B M
3 8-11-13 6 38 ISRO Mr Sudheendra
4 2014-15 3 56 Scorpio Mr Sudheendra
5 25-7-14 4 60 ISRO Mr Nagaraj
6 28-7-14 4 50 Skanray Technologies Mr Rajesh Rao

Student Internship

SL No Year Semster USN Student Name Company
1 2015-2016 VI 1JT13EC058
1JT13EC003
1JT13EC018
1JT13EC041
Yashas K R
Aishwarya V
Indira T
Sahana K
Technologics
2 2015-2016 VIII 1JT12EC008 Arpitha Technologics
3 2015-2016 V 1JT14EC001
1JT14EC034
Adarsh Prabhakara
Pradyumna K H
Protocol
4 2015-2016 VII 1JT13EC031 Pradeep R Protocol
5 2014-2015 V 1JT13EC023
1JT13EC009
1JT13EC034
Varun S
Shubhankar B. J
Protocol
6 2013-2014 III 1JT12EC042
1JT12EC037
Prathibha D
Bharath
Praveen K
Protocol
7 2013-2014 III 1JT12EC042
1JT12EC037
Varun S
Shubhankar B. J
Protocol
8 2014-2015 VI 1JT11EC008
1JT11EC045
1JT11EC043
1JT11EC047
1JT11EC005
1JT11EC035
1JT11EC029
Chaithra. P
Vismayshree B
Vedashree V
Chandan Y
Arun Kumar K O
Sourabha S Bhat
Rajatha B. S
iTriangle: (Embedded Electronics & Software, Mobile Applications, Enterprise Solutions)
9 2015-2016 VIII 1JT12EC019
1JT12EC012
1JT12EC032
Murali
Chaitra
Sameera
BSNL
10 2015-2016 VIII 1JT12EC019
1JT12EC012
1JT12EC032
Murali
Chaitra
Sameera
BSNL
11 2014-2015 VI 1JT12EC019
1JT12EC012
1JT12EC032
Murali
Chaitra
Sameera
BSNL
12 2014-2015 VIII 1JT11EC003
1JT11EC018
1JT11EC032
Adarsh.L
Sagar Gowda
Varun Vasudev Rao
BSNL
13 2013-2014 VI 1JT11EC003
1JT11EC018
1JT11EC032
Adarsh.L
Sagar Gowda
Varun Vasudev Rao
BSNL